{"id":46,"date":"2026-08-12T21:32:40","date_gmt":"2026-08-12T13:32:40","guid":{"rendered":"https:\/\/bmsvr.com\/?p=46"},"modified":"2026-08-12T21:32:40","modified_gmt":"2026-08-12T13:32:40","slug":"bms-%e7%94%b5%e6%b1%a0%e7%ae%a1%e7%90%86%e7%b3%bb%e7%bb%9f%e6%9e%b6%e6%9e%84%e8%af%a6%e8%a7%a3%ef%bc%9a%e4%bb%8e%e5%8d%95%e4%bd%93%e5%88%b0%e7%b3%bb%e7%bb%9f%e7%ba%a7","status":"publish","type":"post","link":"https:\/\/bmsvr.com\/?p=46","title":{"rendered":"BMS \u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\u67b6\u6784\u8be6\u89e3\uff1a\u4ece\u5355\u4f53\u5230\u7cfb\u7edf\u7ea7"},"content":{"rendered":"

BMS \u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\u67b6\u6784\u8be6\u89e3\uff1a\u4ece\u5355\u4f53\u5230\u7cfb\u7edf\u7ea7<\/h1>\n
\n

\u672c\u6587\u5c06\u6df1\u5165\u5256\u6790\u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\u7684\u5206\u5c42\u67b6\u6784\u8bbe\u8ba1\uff0c\u6db5\u76d6 AFE \u91c7\u6837\u94fe\u3001\u4e3b\u63a7 MCU \u9009\u578b\u7b56\u7565\u3001\u901a\u4fe1\u62d3\u6251\u5bf9\u6bd4\u4ee5\u53ca\u9ad8\u538b\u5b89\u5168\u9694\u79bb\u65b9\u6848\uff0c\u4e3a BMS \u5de5\u7a0b\u5e08\u63d0\u4f9b\u7cfb\u7edf\u7ea7\u7684\u8bbe\u8ba1\u53c2\u8003\u3002<\/p>\n<\/blockquote>\n

\n

1. \u5f15\u8a00<\/h2>\n

\u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\uff08Battery Management System\uff0c\u7b80\u79f0 BMS\uff09\u662f\u65b0\u80fd\u6e90\u6c7d\u8f66\u548c\u50a8\u80fd\u7cfb\u7edf\u4e2d\u6700\u6838\u5fc3\u7684\u7535\u5b50\u63a7\u5236\u5355\u5143\u4e4b\u4e00\u3002\u4e00\u4e2a\u8bbe\u8ba1\u826f\u597d\u7684 BMS \u9700\u8981\u5728\u51e0\u6beb\u79d2\u5185\u5b8c\u6210\u6570\u767e\u8282\u7535\u82af\u7684\u7535\u538b\u91c7\u6837\u3001\u6e29\u5ea6\u76d1\u63a7\u3001SOC \u4f30\u7b97\u3001\u5747\u8861\u63a7\u5236\u4ee5\u53ca\u6545\u969c\u8bca\u65ad\uff0c\u540c\u65f6\u4fdd\u8bc1\u529f\u80fd\u5b89\u5168\u7b49\u7ea7\u8fbe\u5230 ASIL-C\/D\u3002<\/p>\n

\u672c\u6587\u5c06 BMS \u67b6\u6784\u5206\u4e3a\u4e09\u4e2a\u5c42\u6b21\u5c55\u5f00\u8ba8\u8bba\uff1a<\/p>\n

    \n
  • \u5355\u4f53\u91c7\u6837\u5c42<\/strong>\uff1aAFE\uff08Analog Front End\uff09\u82af\u7247\u7684\u62d3\u6251\u4e0e\u91c7\u6837\u7b56\u7565<\/li>\n
  • \u4e3b\u63a7\u51b3\u7b56\u5c42<\/strong>\uff1aMCU \u9009\u578b\u3001SOC\/SOH \u7b97\u6cd5\u90e8\u7f72\u4e0e\u5b58\u50a8\u67b6\u6784<\/li>\n
  • \u901a\u4fe1\u4e0e\u9694\u79bb\u5c42<\/strong>\uff1aSPI\/isoSPI\/CAN \u603b\u7ebf\u7684\u9009\u578b\u4e0e\u9ad8\u538b\u9694\u79bb\u8bbe\u8ba1<\/li>\n<\/ul>\n
    \n

    2. \u5355\u4f53\u91c7\u6837\u5c42\u67b6\u6784<\/h2>\n

    2.1 AFE \u82af\u7247\u62d3\u6251<\/h3>\n

    \u76ee\u524d\u4e3b\u6d41 AFE \u82af\u7247\uff08\u5982 ADI LTC6811\u3001TI BQ79616\u3001NXP MC33771\uff09\u5747\u652f\u6301\u83ca\u82b1\u94fe\uff08Daisy Chain\uff09<\/strong> \u62d3\u6251\uff0c\u5355\u9897\u82af\u7247\u901a\u5e38\u53ef\u7ba1\u7406 12~16 \u4e32\u7535\u82af\u3002<\/p>\n

    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510\n\u2502                    BMS Master MCU                     \u2502\n\u2502                      (SPI Host)                      \u2502\n\u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518\n           \u2502 isoSPI \/ SPI\n     \u250c\u2500\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2500\u2510      \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510      \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510\n     \u2502  AFE #1   \u2502\u25c4\u2500\u2500\u2500\u2500\u25ba\u2502  AFE #2   \u2502\u25c4\u2500\u2500\u2500\u2500\u25ba\u2502  AFE #3   \u2502\n     \u2502 Cells 1-12\u2502      \u2502Cells 13-24\u2502      \u2502Cells 25-36\u2502\n     \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518      \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518      \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518\n<\/code><\/pre>\n
    \u5bf9\u4e8e 800V \u9ad8\u538b\u5e73\u53f0\uff08\u5982\u4fdd\u65f6\u6377 Taycan\u3001\u5c0f\u9e4f G9\uff09\uff0c\u901a\u5e38\u9700\u8981 6~8 \u9897 AFE \u7ea7\u8054\u3002\u6b64\u65f6\u83ca\u82b1\u94fe\u7684\u53ef\u9760\u6027\u548c\u901a\u4fe1\u5ef6\u8fdf\u6210\u4e3a\u5173\u952e\u7ea6\u675f\u3002<\/p>\n
    2.2 \u7535\u538b\u91c7\u6837\u7cbe\u5ea6\u4e0e\u6ee4\u6ce2<\/h3>\n
    \u4ee5 LTC6811 \u4e3a\u4f8b\uff0c\u5176 ADC \u5206\u8fa8\u7387\u4e3a 16-bit\uff0c\u5728 \u00b15V \u91cf\u7a0b\u4e0b LSB \u7ea6\u4e3a 152\u03bcV\u3002\u4f46\u5728\u5b9e\u9645\u7cfb\u7edf\u4e2d\uff0c\u4ee5\u4e0b\u51e0\u70b9\u4f1a\u663e\u8457\u5f71\u54cd\u91c7\u6837\u7cbe\u5ea6\uff1a<\/p>\n
      \n
    1. RC \u6ee4\u6ce2\u65f6\u95f4\u5e38\u6570<\/strong>\uff1a\u5178\u578b\u524d\u7aef\u6ee4\u6ce2\u7535\u963b\u4e3a 100\u03a9~1k\u03a9\uff0c\u7535\u5bb9\u4e3a 10nF~100nF\uff0c\u622a\u6b62\u9891\u7387 f_c = 1\/(2\u03c0RC) \u7ea6 1.6kHz~159kHz<\/li>\n
    2. PCB \u8d70\u7ebf\u963b\u6297<\/strong>\uff1a\u957f\u8d70\u7ebf\u4ea7\u751f\u7684 IR drop \u5728\u9ad8\u500d\u7387\u5145\u653e\u7535\u65f6\u53ef\u8fbe\u6570 mV \u7ea7\u522b<\/li>\n
    3. \u5171\u6a21\u566a\u58f0<\/strong>\uff1a\u9ad8\u538b\u4fa7 PWM \u5f00\u5173\u566a\u58f0\u8026\u5408<\/li>\n<\/ol>\n
      \u91c7\u6837\u6297\u6df7\u53e0\u8bbe\u8ba1\u5efa\u8bae<\/strong>\uff1a<\/p>\n
      \/\/ LTC6811 ADC \u91c7\u6837\u914d\u7f6e\u793a\u4f8b\n\/\/ \u4f7f\u7528 7kHz \u4f4e\u901a\u6ee4\u6ce2 + \u6a21\u5f0f 7 (27kHz \u91c7\u6837\u7387)\n\/\/ ADCOPT = 0: \u6807\u51c6\u6a21\u5f0f; ADCOPT = 1: \u5feb\u901f\u6a21\u5f0f\n\n#define ADC_MODE_7KHZ     0x00  \/\/ 7kHz, \u6807\u51c6\u6a21\u5f0f\n#define ADC_MODE_27KHZ    0x01  \/\/ 27kHz, \u5feb\u901f\u6a21\u5f0f (\u4ec5 cell \u7535\u538b)\n\nvoid ltc6811_cfg_adc(uint8_t mode) {\n    uint16_t cfg = 0;\n    \/\/ REFON=1, ADCOPT=mode, GPIO[5:0] as inputs\n    cfg |= (1 << 2);            \/\/ REFON enabled\n    cfg |= (mode << 0);         \/\/ ADC mode select\n    cfg |= (0x3F << 9);         \/\/ GPIO pull-down on\n    ltc6811_write_cfg(cfg);\n}\n<\/code><\/pre>\n
      2.3 \u6e29\u5ea6\u91c7\u6837\u7f51\u7edc<\/h3>\n
      \u5178\u578b BMS \u5728\u6bcf\u4e2a\u6a21\u7ec4\u4e0a\u90e8\u7f72 4~8 \u4e2a NTC \u70ed\u654f\u7535\u963b\uff08\u5982 Murata NCP15WF104\uff09\uff0c\u901a\u8fc7 AFE \u7684 GPIO \u901a\u9053\u4ee5\u5206\u538b\u65b9\u5f0f\u91c7\u6837\uff1a<\/p>\n
      VREF \u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2510\n          R1    \u2502\n          10k   \u2502\n          \u251c\u2500\u2500\u2500\u2500\u2500\u2534\u2500\u2500\u2500\u25ba AFE GPIOx (ADC input)\n         NTC\n       (100k\u03a9 @ 25\u00b0C)\n          \u2502\n         GND\n<\/code><\/pre>\n
      NTC \u6e29\u5ea6\u8f6c\u6362\u516c\u5f0f\uff08Steinhart-Hart \u7b80\u5316\u7248\uff09\uff1a<\/p>\n
      $$T = \\frac{1}{\\frac{1}{T_0} + \\frac{1}{B} \\cdot \\ln\\left(\\frac{R}{R_0}\\right)} – 273.15$$<\/p>\n
      \u5176\u4e2d B = 4250K\uff0cT\u2080 = 298.15K\uff0825\u00b0C\uff09\uff0cR\u2080 = 100k\u03a9\u3002<\/p>\n
      float ntc_to_temperature(float resistance) {\n    const float T0 = 298.15f;   \/\/ 25\u00b0C in Kelvin\n    const float R0 = 100000.0f; \/\/ 100k\u03a9 at 25\u00b0C\n    const float B  = 4250.0f;   \/\/ B-constant\n\n    float inv_T = (1.0f \/ T0) + (1.0f \/ B) * logf(resistance \/ R0);\n    return (1.0f \/ inv_T) - 273.15f;  \/\/ Kelvin -> Celsius\n}\n<\/code><\/pre>\n
      \n
      \u5de5\u7a0b\u6ce8\u610f\u70b9\uff1a\u5f53 NTC \u7ebf\u675f\u65ad\u88c2\u65f6\uff0cADC \u8bfb\u6570\u4f1a\u8d8b\u5411 VREF \u6216 GND\uff0c\u5bf9\u5e94\u6781\u7aef\u6e29\u5ea6\u3002\u52a1\u5fc5\u5728\u8f6f\u4ef6\u4e2d\u52a0\u5165 NTC \u5f00\u8def\/\u77ed\u8def\u8bca\u65ad\uff0c\u5426\u5219\u53ef\u80fd\u5bfc\u81f4\u8bef\u89e6\u53d1\u70ed\u5931\u63a7\u4fdd\u62a4\u3002<\/p>\n<\/blockquote>\n
      \n
      3. \u4e3b\u63a7\u51b3\u7b56\u5c42\u67b6\u6784<\/h2>\n
      3.1 MCU \u9009\u578b<\/h3>\n
      BMS \u4e3b\u63a7 MCU \u7684\u6838\u5fc3\u9700\u6c42\uff1a<\/p>\n\n\n\n\n\n\n\n\n\n\n
      \u9700\u6c42<\/th>\n\u6307\u6807<\/th>\n\u5178\u578b\u9009\u578b<\/th>\n<\/tr>\n<\/thead>\n
      \u7b97\u529b<\/td>\n> 200 DMIPS<\/td>\nNXP S32K3xx, Infineon TC3xx, TI TMS570<\/td>\n<\/tr>\n
      Flash<\/td>\n\u2265 2MB<\/td>\n\u652f\u6301 OTA A\/B \u5206\u533a<\/td>\n<\/tr>\n
      RAM<\/td>\n\u2265 256KB<\/td>\nECC \u4fdd\u62a4<\/td>\n<\/tr>\n
      CAN FD<\/td>\n\u2265 3 \u8def<\/td>\n\u52a8\u529b CAN \/ \u8bca\u65ad CAN \/ \u9884\u7559<\/td>\n<\/tr>\n
      \u529f\u80fd\u5b89\u5168<\/td>\nASIL-D<\/td>\nLockstep \u53cc\u6838\u6216 ECC \u5168\u8986\u76d6<\/td>\n<\/tr>\n
      AEC-Q100<\/td>\nGrade 1<\/td>\n-40\u00b0C ~ +125\u00b0C<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
      \u4ee5 NXP S32K344 \u4e3a\u4f8b\uff0c\u5176\u53cc\u6838 Lockstep Cortex-M7 @ 160MHz\uff0c\u63d0\u4f9b\u7ea6 400 DMIPS \u7b97\u529b\uff0c\u8db3\u4ee5\u8fd0\u884c\u6269\u5c55\u5361\u5c14\u66fc\u6ee4\u6ce2\uff08EKF\uff09\u6216\u81ea\u9002\u5e94 SOC \u4f30\u8ba1\u7b97\u6cd5\u3002<\/p>\n
      3.2 SOC \u4f30\u7b97\u8f6f\u4ef6\u67b6\u6784<\/h3>\n
      \/\/ SOC \u4f30\u7b97\u6838\u5fc3\u8c03\u5ea6\u6846\u67b6\ntypedef struct {\n    float soc;           \/\/ \u5f53\u524d SOC (0.0 ~ 1.0)\n    float soh;           \/\/ \u5f53\u524d SOH\n    float ocv;           \/\/ \u5f00\u8def\u7535\u538b OCV\n    float r0;            \/\/ \u6b27\u59c6\u5185\u963b\n    float r1, c1;        \/\/ RC \u73af\u8282\u53c2\u6570 (1\u9636 Thevenin)\n    float v_rc;          \/\/ RC \u73af\u8282\u6781\u5316\u7535\u538b\n    float q_max;         \/\/ \u5f53\u524d\u6700\u5927\u53ef\u7528\u5bb9\u91cf (Ah)\n} battery_state_t;\n\ntypedef enum {\n    SOC_MODE_OCV_LOOKUP,    \/\/ \u9759\u7f6e\u6001: OCV-SOC \u67e5\u8868\n    SOC_MODE_COULOMB,       \/\/ \u52a8\u6001: \u5b89\u65f6\u79ef\u5206\n    SOC_MODE_EKF,           \/\/ \u7a33\u6001: \u6269\u5c55\u5361\u5c14\u66fc\u6ee4\u6ce2\n    SOC_MODE_CHARGE_END,    \/\/ \u5145\u7535\u672b\u7aef: \u7535\u538b\u62d0\u70b9\u6821\u51c6\n} soc_mode_t;\n\nsoc_mode_t select_soc_mode(battery_context_t *ctx) {\n    if (ctx->rest_time > 3600)  \/\/ \u9759\u7f6e\u8d85\u8fc7 1 \u5c0f\u65f6\n        return SOC_MODE_OCV_LOOKUP;\n    if (ctx->current < 0.5)     \/\/ \u5c0f\u7535\u6d41\u7a33\u6001\n        return SOC_MODE_EKF;\n    if (ctx->cell_voltage > 4.15f && ctx->current < 1.0f)\n        return SOC_MODE_CHARGE_END;\n    return SOC_MODE_COULOMB;    \/\/ \u9ed8\u8ba4: \u5b89\u65f6\u79ef\u5206\n}\n<\/code><\/pre>\n
      3.3 \u6570\u636e\u5b58\u50a8\u4e0e NVM \u7b56\u7565<\/h3>\n
      BMS \u9700\u8981\u6301\u4e45\u5316\u7684\u5173\u952e\u6570\u636e\uff1a<\/p>\n\n\n\n\n\n\n\n\n\n
      \u6570\u636e\u9879<\/th>\n\u5927\u5c0f<\/th>\n\u5199\u5165\u9891\u7387<\/th>\n\u5b58\u50a8\u4ecb\u8d28<\/th>\n<\/tr>\n<\/thead>\n
      SOC\/SOH \u65ad\u70b9\u4fdd\u5b58<\/td>\n32B<\/td>\n\u6bcf 10 \u5206\u949f<\/td>\nMCU Data Flash (EEPROM \u6a21\u62df)<\/td>\n<\/tr>\n
      \u5faa\u73af\u8ba1\u6570 + \u7d2f\u8ba1 Ah<\/td>\n16B<\/td>\n\u6bcf\u5faa\u73af 1 \u6b21<\/td>\nMCU Data Flash<\/td>\n<\/tr>\n
      \u6545\u969c DTC \u65e5\u5fd7<\/td>\n4KB<\/td>\n\u4e8b\u4ef6\u89e6\u53d1<\/td>\n\u5916\u90e8 SPI NOR Flash (\u226516MB)<\/td>\n<\/tr>\n
      \u7535\u82af\u5386\u53f2\u6781\u503c<\/td>\n128B<\/td>\n\u6bcf\u6b21\u884c\u7a0b\u7ed3\u675f<\/td>\nMCU Data Flash<\/td>\n<\/tr>\n
      OTA \u56fa\u4ef6\u5907\u4efd<\/td>\n2MB<\/td>\nOTA \u65f6<\/td>\n\u5916\u90e8 NOR Flash<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
      \n
      Flash \u78e8\u635f\u5747\u8861<\/strong>\uff1a\u4ee5 NXP S32K3 \u7684 64KB Data Flash \u4e3a\u4f8b\uff0c\u5178\u578b\u64e6\u5199\u5bff\u547d 10 \u4e07\u6b21\u3002\u82e5\u6bcf 10 \u5206\u949f\u5199\u5165\u4e00\u6b21 SOC \u65ad\u70b9\u6570\u636e\uff0c\u6309 16 \u5757\u865a\u62df\u6247\u533a\u505a\u78e8\u635f\u5747\u8861\uff0c\u603b\u5bff\u547d\u7ea6\u4e3a\uff1a16 \u00d7 100,000 \u00d7 10 min \u2248 30 \u5e74\uff0c\u8fdc\u8d85\u51fa\u6574\u8f66\u5bff\u547d\u3002<\/p>\n<\/blockquote>\n
      \n
      4. \u901a\u4fe1\u4e0e\u9694\u79bb\u5c42\u67b6\u6784<\/h2>\n
      4.1 \u901a\u4fe1\u603b\u7ebf\u5bf9\u6bd4<\/h3>\n\n\n\n\n\n\n\n\n\n
      \u603b\u7ebf<\/th>\n\u901f\u7387<\/th>\n\u62d3\u6251<\/th>\n\u9694\u79bb\u65b9\u6848<\/th>\n\u5178\u578b\u7528\u9014<\/th>\n<\/tr>\n<\/thead>\n
      SPI<\/td>\n\u226410 Mbps<\/td>\n\u70b9\u5bf9\u70b9<\/td>\n\u6570\u5b57\u9694\u79bb\u5668<\/td>\n\u677f\u5185 AFE \u901a\u4fe1<\/td>\n<\/tr>\n
      isoSPI<\/td>\n1 Mbps<\/td>\n\u83ca\u82b1\u94fe<\/td>\n\u53d8\u538b\u5668\/\u7535\u5bb9<\/td>\n\u8de8\u6a21\u7ec4 AFE \u7ea7\u8054<\/td>\n<\/tr>\n
      CAN<\/td>\n1 Mbps<\/td>\n\u603b\u7ebf\u578b<\/td>\n\u9694\u79bb CAN \u6536\u53d1\u5668<\/td>\n\u6574\u8f66\u901a\u4fe1<\/td>\n<\/tr>\n
      CAN FD<\/td>\n5~8 Mbps<\/td>\n\u603b\u7ebf\u578b<\/td>\n\u9694\u79bb CAN FD<\/td>\n\u8bca\u65ad \/ OTA<\/td>\n<\/tr>\n
      \u83ca\u82b1\u94fe UART<\/td>\n2 Mbps<\/td>\n\u83ca\u82b1\u94fe<\/td>\n\u7535\u5bb9\u9694\u79bb<\/td>\nTI BQ79616 \u7ea7\u8054<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
      4.2 \u9ad8\u538b\u9694\u79bb\u8bbe\u8ba1<\/h3>\n
      800V \u5e73\u53f0\u4e0b\uff0cBMS \u4e3b\u63a7\u677f\u548c\u9ad8\u538b\u91c7\u6837\u677f\u4e4b\u95f4\u9700\u8981\u6ee1\u8db3 IEC 60664-1 \u52a0\u5f3a\u7edd\u7f18<\/strong> \u8981\u6c42\uff0c\u5373\u81f3\u5c11\u9700\u8981\u627f\u53d7 2\u00d7U_max + 1000V \u2248 3900V \u7684\u9694\u79bb\u8010\u538b\u3002<\/p>\n
      \/\/ \u9694\u79bb\u5931\u6548\u68c0\u6d4b \u2014 \u901a\u8fc7\u5468\u671f\u6027\u8bfb\u56de AFE \u5bc4\u5b58\u5668\nbool check_isolation_integrity(uint8_t afe_id) {\n    uint16_t cfg_readback, cfg_expected;\n\n    cfg_expected = ltc6811_get_cfg_shadow(afe_id);\n    cfg_readback = ltc6811_rdcfg(afe_id);\n\n    \/\/ CRC \u6821\u9a8c\u7531 LTC6811 PEC \u4fdd\u8bc1\uff0c\u6b64\u5904\u505a\u914d\u7f6e\u56de\u8bfb\u4e00\u81f4\u6027\u68c0\u67e5\n    if (cfg_readback != cfg_expected) {\n        set_fault(DTC_AFE_COMM_LOSS | (afe_id << 8));\n        return false;\n    }\n    return true;\n}\n<\/code><\/pre>\n
      \n
      \u5b9e\u9645\u5de5\u7a0b\u4e2d\uff0cisoSPI \u7684\u53d8\u538b\u5668\u9009\u578b\u81f3\u5173\u91cd\u8981\u3002\u63a8\u8350\u4f7f\u7528 TDK ACT1210 \u7cfb\u5217\u5171\u6a21\u627c\u6d41\u5708\u914d\u5408 Pulse HX1188NL \u9694\u79bb\u53d8\u538b\u5668\uff0c\u53ef\u6709\u6548\u6291\u5236\u5171\u6a21\u77ac\u6001\u6297\u6270\u5ea6\uff08CMTI\uff09> 100kV\/\u03bcs\u3002<\/p>\n<\/blockquote>\n
      4.3 \u7cfb\u7edf\u7ea7 BMS \u901a\u4fe1\u67b6\u6784\u56fe<\/h3>\n
      \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510\n\u2502                      Vehicle CAN Bus                     \u2502\n\u2502              (CAN FD 2Mbps \/ CAN 500kbps)               \u2502\n\u2514\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518\n     \u2502            \u2502              \u2502              \u2502\n\u250c\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2510 \u250c\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2510   \u250c\u2500\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2500\u2510  \u250c\u2500\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2500\u2510\n\u2502  VCU    \u2502 \u2502  MCU    \u2502   \u2502   BMS     \u2502  \u2502   OBC     \u2502\n\u2502(Vehicle \u2502 \u2502(Motor   \u2502   \u2502  Master   \u2502  \u2502(On-Board  \u2502\n\u2502 Control)\u2502 \u2502Control) \u2502   \u2502   Board   \u2502  \u2502 Charger)  \u2502\n\u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518 \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518   \u2514\u2500\u2500\u2500\u2500\u2500\u252c\u2500\u2500\u2500\u2500\u2500\u2518  \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518\n                                \u2502 isoSPI (1Mbps)\n              \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u253c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510\n         \u250c\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2510       \u250c\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2510       \u250c\u2500\u2500\u2500\u2500\u25bc\u2500\u2500\u2500\u2500\u2510\n         \u2502  CMU #1  \u2502       \u2502  CMU #2  \u2502       \u2502  CMU #3  \u2502\n         \u2502 (AFE x2) \u2502       \u2502 (AFE x2) \u2502       \u2502 (AFE x2) \u2502\n         \u2502 24 cells \u2502       \u2502 24 cells \u2502       \u2502 24 cells \u2502\n         \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518       \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518       \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518\n          isoSPI \u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518   \u2502   \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2500 isoSPI\n                        Daisy Chain (Transformer Isolated)\n<\/code><\/pre>\n
      \n
      5. \u529f\u80fd\u5b89\u5168\u4e0e\u5197\u4f59\u8bbe\u8ba1<\/h2>\n
      5.1 ASIL \u5206\u89e3\u7b56\u7565<\/h3>\n
      BMS \u6838\u5fc3\u5b89\u5168\u76ee\u6807\uff08Safety Goal\uff09\uff1a<\/p>\n\n\n\n\n\n\n\n
      ID<\/th>\n\u5b89\u5168\u76ee\u6807<\/th>\nASIL<\/th>\n\u5b89\u5168\u72b6\u6001<\/th>\n<\/tr>\n<\/thead>\n
      SG-01<\/td>\n\u9632\u6b62\u8fc7\u5145\u5bfc\u81f4\u70ed\u5931\u63a7<\/td>\nASIL-D<\/td>\n\u65ad\u5f00\u4e3b\u7ee7\u7535\u5668<\/td>\n<\/tr>\n
      SG-02<\/td>\n\u9632\u6b62\u8fc7\u653e\u5bfc\u81f4\u7535\u82af\u635f\u574f<\/td>\nASIL-C<\/td>\n\u9650\u529f\u7387\u5e76\u544a\u8b66<\/td>\n<\/tr>\n
      SG-03<\/td>\n\u9632\u6b62\u8fc7\u6e29\u8fd0\u884c<\/td>\nASIL-C<\/td>\n\u964d\u529f\u7387 \/ \u65ad\u5f00<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
      \u9488\u5bf9 ASIL-D \u7684 SG-01\uff0c\u53ef\u8fdb\u884c ASIL \u5206\u89e3\uff1a<\/p>\n
        \n
      • ASIL-D = ASIL-B(D) + ASIL-B(D)<\/strong>\uff1a\u4f7f\u7528\u72ec\u7acb\u7684\u4e24\u8def\u7535\u538b\u91c7\u6837\u94fe<\/li>\n
      • AFE #1\uff08\u4e3b\u8def\uff09\uff1aLTC6811 \u2192 \u7ecf MCU Lockstep Core A \u5904\u7406<\/li>\n
      • AFE #2\uff08\u5197\u4f59\uff09\uff1aTI BQ79616 \u2192 \u7ecf MCU Lockstep Core B \u5904\u7406<\/li>\n<\/ul>\n
        5.2 \u4e8c\u7ea7\u4fdd\u62a4\u786c\u4ef6<\/h3>\n
        BMS \u5e94\u5177\u5907\u72ec\u7acb\u4e8e MCU \u7684\u786c\u4ef6\u8fc7\u538b\u4fdd\u62a4<\/strong>\uff08Secondary Protection\uff09\uff1a<\/p>\n
        \/\/ \u786c\u4ef6\u8fc7\u538b\u6bd4\u8f83\u5668 (\u72ec\u7acb\u4e8e MCU)\n\/\/ \u4f7f\u7528 TI BQ77216 \u4f5c\u4e3a Secondary Protector\n\/\/ \u5f53\u4efb\u4e00\u7535\u82af\u7535\u538b\u8d85\u8fc7 4.25V\uff0c\u76f4\u63a5\u89e6\u53d1\u4fdd\u9669\u4e1d\u9a71\u52a8\u4fe1\u53f7\n#define SECONDARY_OV_THRESHOLD_MV  4250  \/\/ 4.25V\n#define SECONDARY_UV_THRESHOLD_MV  2200  \/\/ 2.20V\n<\/code><\/pre>\n
        \n
        BQ77216 \u54cd\u5e94\u65f6\u95f4 < 1ms\uff0c\u4e0d\u4f9d\u8d56\u4efb\u4f55\u8f6f\u4ef6\u903b\u8f91\uff0c\u6ee1\u8db3\u529f\u80fd\u5b89\u5168\u5bf9\u72ec\u7acb\u6027\u7684\u8981\u6c42\u3002<\/p>\n<\/blockquote>\n
        \n
        6. \u5de5\u7a0b\u5b9e\u8df5\u4e2d\u7684\u5e38\u89c1\u9677\u9631\u4e0e\u5efa\u8bae<\/h2>\n
        6.1 AFE \u83ca\u82b1\u94fe\u65ad\u5f00\u6062\u590d<\/h3>\n
        \u5f53\u67d0\u9897 AFE \u56e0 EMI \u5e72\u6270\u5bfc\u81f4\u901a\u4fe1\u6545\u969c\u65f6\uff0c\u6574\u4e2a\u83ca\u82b1\u94fe\u65ad\u88c2\u3002\u5e94\u5728 LTC6811 \u7684 isoSPI \u7aef\u53e3\u5904\u6dfb\u52a0\u770b\u95e8\u72d7\u8d85\u65f6\u56de\u9000\u7535\u8def<\/strong>\uff0c\u786e\u4fdd\u901a\u4fe1\u4e22\u5931\u65f6 AFE \u81ea\u52a8\u8fdb\u5165\u4fdd\u62a4\u72b6\u6001\uff0c\u800c\u975e\u7ef4\u6301\u4e0a\u4e00\u6b21\u7684\u5747\u8861\u6307\u4ee4\u2014\u2014\u540e\u8005\u53ef\u80fd\u5bfc\u81f4\u7535\u82af\u8fc7\u653e\u3002<\/p>\n
        6.2 SOC \u8df3\u53d8\u95ee\u9898<\/h3>\n
        \u5b89\u65f6\u79ef\u5206\u6cd5\u7684\u6838\u5fc3\u8bef\u5dee\u6e90\u2014\u2014\u7535\u6d41\u4f20\u611f\u5668\u96f6\u6f02<\/strong>\uff08\u901a\u5e38 \u00b150mA\uff09\u3002\u5728 50kWh \u7535\u6c60\u5305\u4e0a\uff0c\u00b150mA \u7684\u6f02\u79fb\u6bcf\u5c0f\u65f6\u7d2f\u79ef\u8bef\u5dee\u7ea6\u4e3a 50mAh\uff0c100 \u5c0f\u65f6\u540e\u8fbe\u5230 5Ah\uff08\u7ea6 10% SOC \u504f\u5dee\uff09\u3002\u5efa\u8bae\uff1a<\/p>\n
          \n
        • \u6bcf\u6b21\u9759\u7f6e >2 \u5c0f\u65f6\u540e\u6267\u884c OCV-SOC \u91cd\u6821\u51c6<\/li>\n
        • \u4f7f\u7528\u53cc\u7535\u6d41\u4f20\u611f\u5668\uff08LEM + Shunt\uff09\u4ea4\u53c9\u6821\u9a8c<\/li>\n
        • \u5145\u7535\u672b\u7aef SOC=100% \u65f6\u5f3a\u5236\u590d\u4f4d\u7d2f\u8ba1\u8bef\u5dee<\/li>\n<\/ul>\n
          6.3 \u5747\u8861\u7b56\u7565\u7684\u65f6\u95f4\u7a97\u53e3<\/h3>\n
          \u88ab\u52a8\u5747\u8861\uff08Passive Balancing\uff09\u901a\u5e38\u5728\u5145\u7535\u672b\u7aef\u6267\u884c\uff0c\u5178\u578b\u5747\u8861\u7535\u6d41 50~200mA\u3002\u4ee5 100Ah \u7535\u82af\u4e3a\u4f8b\uff0c5% \u7684 SOC \u5dee\u5f02\u9700\u8981\uff1a<\/p>\n
          $$t_{balance} = \\frac{C_{cell} \\times \\Delta SOC}{I_{balance}} = \\frac{100 \\times 0.05}{0.1} = 50 \\text{ \u5c0f\u65f6}$$<\/p>\n
          \n
          \u56e0\u6b64\uff0c\u88ab\u52a8\u5747\u8861\u65e0\u6cd5\u5728\u5355\u6b21\u5145\u7535\u4e2d\u5b8c\u6210\u5927\u8303\u56f4\u5bb9\u91cf\u504f\u5dee\u4fee\u6b63\u3002\u5bf9\u4e8e\u5b9a\u671f\u5747\u8861\uff0c\u5efa\u8bae\u8bbe\u7f6e\u5747\u8861\u7a97\u53e3\u8de8\u591a\u6b21\u5145\u7535\u5468\u671f\uff0c\u5e76\u52a0\u5165\u5747\u8861\u7d2f\u79ef\u8ba1\u6570\u5668\u3002<\/p>\n<\/blockquote>\n
          \n
          7. \u7ed3\u8bed<\/h2>\n
          BMS \u67b6\u6784\u8bbe\u8ba1\u662f\u4e00\u4e2a\u591a\u7ef4\u5ea6\u6743\u8861\u7684\u8fc7\u7a0b\uff1a\u91c7\u6837\u7cbe\u5ea6 vs \u7269\u6599\u6210\u672c\u3001\u901a\u4fe1\u901f\u7387 vs EMI \u9c81\u68d2\u6027\u3001SOC \u7cbe\u5ea6 vs \u7b97\u529b\u6d88\u8017\u3001\u529f\u80fd\u5b89\u5168\u7b49\u7ea7 vs \u7cfb\u7edf\u590d\u6742\u5ea6\u3002\u672c\u6587\u4ece\u5355\u4f53\u91c7\u6837\u3001\u4e3b\u63a7\u51b3\u7b56\u5230\u901a\u4fe1\u9694\u79bb\u4e09\u4e2a\u5c42\u6b21\u8fdb\u884c\u4e86\u7cfb\u7edf\u6027\u7684\u68b3\u7406\uff0c\u5e0c\u671b\u80fd\u4e3a BMS \u5de5\u7a0b\u5e08\u5728\u5b9e\u9645\u9879\u76ee\u4e2d\u63d0\u4f9b\u5de5\u7a0b\u5316\u7684\u53c2\u8003\u6846\u67b6\u3002<\/p>\n
          \u968f\u7740 800V \u9ad8\u538b\u5e73\u53f0\u548c CTC\uff08Cell-to-Chassis\uff09\u67b6\u6784\u7684\u666e\u53ca\uff0cBMS \u6b63\u9010\u6b65\u5411\u65e0\u7ebf\u5316<\/strong>\uff08wBMS\uff0c\u5982 ADI \u7684\u65b9\u6848\uff09\u548c\u4e91\u539f\u751f<\/strong>\uff08Cloud BMS\uff0c\u5229\u7528\u5927\u6570\u636e\u4f18\u5316 SOC\/SOH \u7b97\u6cd5\uff09\u65b9\u5411\u6f14\u8fdb\uff0c\u8fd9\u5c06\u5728\u540e\u7eed\u6587\u7ae0\u4e2d\u6df1\u5165\u63a2\u8ba8\u3002<\/p>\n
          \n
          \u53c2\u8003\u8d44\u6599\uff1a<\/em>
          \n– ADI LTC6811 Datasheet<\/em>
          \n– TI BQ79616-Q1 Technical Reference Manual<\/em>
          \n– NXP S32K3xx Reference Manual<\/em>
          \n– ISO 26262-5:2018 Annex D – ASIL Decomposition<\/em>
          \n– IEC 60664-1 Insulation Coordination<\/em><\/p>\n
          \n
          \u6807\u7b7e<\/strong>\uff1a#BMS\u67b6\u6784 #AFE\u91c7\u6837 #SOC\u4f30\u7b97 #\u529f\u80fd\u5b89\u5168 #\u9ad8\u538b\u9694\u79bb #\u83ca\u82b1\u94fe #\u7535\u6c60\u7ba1\u7406\u7cfb\u7edf<\/p>\n","protected":false},"excerpt":{"rendered":"
          BMS \u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\u67b6\u6784\u8be6\u89e3\uff1a\u4ece\u5355\u4f53\u5230\u7cfb\u7edf\u7ea7 \u672c\u6587\u5c06\u6df1\u5165\u5256\u6790\u7535\u6c60\u7ba1\u7406\u7cfb\u7edf\u7684\u5206\u5c42\u67b6\u6784\u8bbe\u8ba1\uff0c\u6db5\u76d6 AFE \u91c7\u6837\u94fe\u3001 […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[13],"tags":[35,4,16,36,27,34,37],"class_list":["post-46","post","type-post","status-publish","format-standard","hentry","category-bms","tag-afe","tag-bms","tag-soc","tag-27","tag-34","tag-37"],"_links":{"self":[{"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/posts\/46","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/bmsvr.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=46"}],"version-history":[{"count":1,"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/posts\/46\/revisions"}],"predecessor-version":[{"id":47,"href":"https:\/\/bmsvr.com\/index.php?rest_route=\/wp\/v2\/posts\/46\/revisions\/47"}],"wp:attachment":[{"href":"https:\/\/bmsvr.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=46"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/bmsvr.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=46"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/bmsvr.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=46"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}